Policy Update
Rounak Panda
Background
The Scheme for Promotion of Manufacturing of Electronic Components and Semiconductors (SPECS), launched by the Ministry of Electronics and Information Technology (MeitY) in April 2020, is a significant policy lever under the National Policy on Electronics (NPE) 2019. India’s electronics sector will likely grow to USD 300 billion by 2026 (MeitY Vision Document, 2022), but 85–90% of electronic components continue to be imported, exposing severe risks to supply chain sovereignty, cost competitiveness, and strategic autonomy.
SPECS aims to catalyse investments in the manufacturing of active and passive components, semiconductor packaging, and sub-assemblies, thereby enhancing domestic value addition, which remains at a low 15–18% across most segments of electronics manufacturing. It complements flagship initiatives like the Production Linked Incentive (PLI) schemes for large-scale electronics manufacturing, the Design Linked Incentive (DLI) for semiconductor design startups, and the India Semiconductor Mission (ISM), by addressing a critical yet underdeveloped segment — the “middle layer” of the electronics supply chain. This layer includes the manufacturing of components, sub-assemblies, and semiconductor packaging infrastructure, which are essential for achieving backward integration, enhancing domestic value addition, and ensuring that India’s electronics ecosystem is not overly reliant on imports for foundational technologies.
Functioning
SPECS functions through a 25% capital subsidy mechanism, reimbursing investment in plant, machinery, cleanroom infrastructure, and R&D tools for eligible entities.
Key Structural Features:
| Parameter | Detail |
| Incentive | 25% of CapEx reimbursement |
| Eligibility | Greenfield and brownfield units engaged in electronics component or semiconductor packaging |
| Minimum Investment Threshold | ₹5 crore for components; ₹1 crore for ATMP/test facilities |
| Project Evaluation | Handled by Project Management Agency (IFCI Ltd) |
| Disbursal | Linked to capital asset creation milestones |
| Timeline | Open for applications until March 2025 |
The scheme covers over 20 product categories, including multilayer PCBs, chip resistors, ceramic capacitors, diodes, power devices, IC substrates, and display backlights.
▪ Technical Expenditure Coverage:
- Plant & machinery (ISO-certified production tools)
- Environmental control systems (HVAC, cleanrooms ISO 7/ISO 8)
- Electronic Design Automation (EDA) tools for testing/validation (Cadence, Synopsys)
- Facilities for wafer dicing, die bonding, marking, and packaging (for Assembly, Testing, Marking, and Packaging – ATMP lines)
Performance (2020–2024)
As of FY Q4 2023–24, the scheme has shown moderate uptake, constrained partly by global semiconductor headwinds but promising in terms of value-added manufacturing.
Key Metrics
| Indicator | Figure | Source |
| Project proposals received | 70+ | MeitY Monitoring Cell |
| Total approvals (as of March 2024) | 32 | PIB Press Release, Feb 2024 |
| Committed investments | ₹1,340 crore | MeitY Annual Report 2023 |
| Incentives sanctioned | ₹538 crore | MeitY Dashboard |
| Incentives disbursed | ₹357 crore | RTI Reply, MeitY (2024) |
| Direct employment created | 6,823 jobs | Project Evaluation Portal |
| Share of MSMEs in projects | 28.40% | SPECS MIS, MeitY |
▪ Project Types Funded:
- 6 units for SMT line integration for LED TVs and mobile phones
- 5 ATMP and semiconductor testing plants (e.g., in Gujarat, Karnataka)
- 3 high-reliability capacitor/inductor plants for automotive and defense
- 4 PCB facilities with >8-layer capability for telecom-grade applications
State-Level Distribution:
| State | Projects Approved | Investment Committed |
| Karnataka | 8 | ₹410 crore |
| Tamil Nadu | 5 | ₹265 crore |
| Uttar Pradesh | 4 | ₹180 crore |
| Maharashtra | 3 | ₹140 crore |
| Gujarat | 5 | ₹190 crore |
Impact
- Supply Chain Localization
The SPECS initiative is enabling the shift of component manufacturing from import-heavy to localized production, thus reducing the bill of materials (BoM) import intensity. Several large OEMs such as Apple, Samsung, and Dixon now have domestic component vendors co-locating with their final assembly plants, cutting component lead times by 30–40%.
- Semiconductor Ecosystem Support
The scheme supports 5 new ATMP/test packaging units, which are vital for closing India’s design–manufacturing loop. These facilities will serve both indigenous fabless chip design startups (under DLI) and global design houses.
Example: An approved ATMP plant in Gujarat targets 20 million IC units/year capacity, focused on automotive MCUs and RF modules, contributing to India’s EV and telecom sectors.
- Technology Absorption and R&D
R&D-enabled projects under SPECS have established reliability test labs and burn-in chambers, helping improve component quality for export markets. The rise of domestic PCB and interconnect design facilities aligns with India’s push for trusted electronics and tamper-proof defense systems.
- MSME Inclusion and Regional Diversification
28% of approved proposals are from MSMEs, including ventures in Nashik, Bhopal, and Hubli, indicating regional deepening of high-tech manufacturing capacity.
Emerging Issues
| Challenge | Description | Proposed Action |
| High CapEx barriers for MSMEs | SME units struggle to raise upfront capital, even with 25% reimbursement | Allow credit-linked pre-financing; establish SPECS-dedicated VC fund |
| Delays in disbursal | Verification of the capex documentation slows down the subsidy release | Digitize the capex audit through blockchain-based smart invoicing |
| Lack of demand aggregation | OEMs still rely on offshore suppliers for bulk components | Build OEM–SME vendor matchmaking platforms (similar to GeM) |
| Technology obsolescence risk | Equipment financed under SPECS may become outdated in 5–7 years | Provide tech-refresh top-up incentive under SPECS 2.0 |
| Skilled manpower shortage | Operation of SMT lines, cleanrooms requires advanced training | Link SPECS clusters with ESSCI (Electronics Sector Skills Council of India) certification programs |
Way Forward
1. Launch SPECS 2.0 (2025–30)
A restructured phase focusing on deep-tech component manufacturing (e.g., GaN, SiC devices), chiplet packaging, photonic ICs, and ultra-thin flexible electronics.
2. Establish National Component Corridors
Regional corridors like Chennai–Bengaluru, Pune–Nashik, and Noida–Yamuna Expressway to serve as integrated supply chain clusters for display panels, PCBs, and power devices.
3. International Collaboration
Invite strategic partnerships under Japan–India Semiconductor Partnership, US–India iCET to set up pilot lines for advanced packaging and interconnects under the SPECS umbrella.
4. Vertical Integration with ISM and PLI
Make SPECS applications mandatory for all PLI beneficiary OEMs to ensure vertical integration with domestic suppliers, improving value chain coherence.
5. Green Electronics Mandate
Incentivize SPECS units that use RoHS-compliant, lead-free, and recyclable material inputs and energy-efficient production lines.
Reference
Ministry of Electronics and Information Technology. (2023). Annual Report 2022–23. Government of India.https://meity.gov.in/
Press Information Bureau. (2024, February 12). Government boosts component manufacturing under SPECS. Government of India. https://pib.gov.in/PressReleseDetail.aspx?PRID=2002345
India Semiconductor Mission. (2023). ATMP and OSAT Ecosystem: Policy Roadmap. Ministry of Electronics and Information Technology. https://ism.gov.in/
Invest India. (2023). SPECS Scheme Tracker: State-wise Distribution. Department for Promotion of Industry and Internal Trade. https://investindia.gov.in/
RTI Response No. 4512/MeitY/SPECS. (2024). Disbursal Data under SPECS Scheme. Ministry of Electronics and Information Technology.
NITI Aayog. (2022). Electronics Manufacturing Policy Gap Study. Government of India. https://niti.gov.in
IMPRI. (2024). Chips, Skills, and Systems: The Story of India’s Special Manpower Development Programme for Chips to System Design Initiative (SMDP-C2SD-2014), Rounak Panda, IMPRI.
ABOUT THE CONTRIBUTOR
Rounak Panda, Research Intern, IMPRI. Currently pursuing B.Sc (Hons) Economics at Dr. B R Ambedkar School of Economics – University, Bengaluru.
Acknowledgement
The author sincerely thanks the IMPRI team and Ms. Aasthaba Jadeja for her invaluable guidance.
Disclaimer: All views expressed in the article belong solely to the author and not necessarily to the organisation.
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