Policy Update
Swanami Ghosh
Background
The “Chips to Startup (C2S) Programme” is a foundation scheme of the Ministry of Electronics and Information Technology (MeitY) and follows through on the National Policy on Electronics 2019 (NPE-2019). The programme was formed based on the aim of India becoming a global Electronics System Design and Manufacturing (ESDM) hub and limiting its electronic imports. The program officially began with MeitY seeking applications from academia, R&D institutions, startups, MSMEs, and online applications were accepted until January 31, 2022.
C2S Programme is central to MeitY’s systematic transformation of India’s semiconductor design capacities in over 300 organizations, of which 250 are academic institutions and 65 are startup firms. C2S Programme is aimed specifically at building 85,000 industry-ready B.Tech, M.Tech, and PhD professionals with expertise in semiconductor chip design.
The main goals of the C2S Programme are:
- Manpower Development: To develop 85,000 quality engineers in Very Large-Scale Integration (VLSI) and Embedded System Design within five years.
- IP Creation & Design: To create 175 ASICs (Application Specific Integrated Circuits), 20 functional prototypes of System on Chips (SoC), 30 FPGA-based designs, and 30 IP Cores.
- Ecosystem Development: For developing a robust fabless chip design ecosystem in India, develop a design culture at educational levels, and become a catalyst for the development of fabless design startups.
The beneficiaries of this program are about 100 R&D organizations/academic institutions in the country, along with MSMEs and startups. There are projects that deal with creating frugal solutions to societal issues in areas such as Energy & Environment, Healthcare, Agriculture, Disaster Management, Intelligent Transport Systems, Emerging Technology, and Safety & Security.
Functioning
The C2S Programme is administered mainly with the Centre for Development of Advanced Computing (C-DAC) being the nodal organization. It caters to the whole electronics value chain through:
- Specialized Manpower Training: The program provides in-depth hands-on exposure to chip designing, fabricating, and testing through periodic training provided jointly with industry partners. Students are mentored and provided with vital resources.
- Design Infrastructure Support: Providing access to Electronic Design Automation (EDA) tools (e.g., from Siemens, Cadence, Synopsys, Mentor Graphics, Silvaco, Ansys, Keysight), access to foundries for fabrication in MPW (Multi-Project Wafer) mode, support for packaging of chips, support for testing and characterization, and having an IP Core Repository.
- Centralized Design Facility: The C2S Programme initiated the ChipIN Centre at C-DAC, which is one of the biggest design facilities in the country, and is a centralized design facility providing high-end chip design infrastructure directly to the semiconductor design community in India. The ChipIN Centre has state-of-the-art tools which support the entire chip design cycle up to a 5nm or advanced node technology, and aggregate services for fabricating designs at foundries and packaging.
- Collaborative Projects: There are initiatives to promote Academia – Industry Collaborative Projects, Grand Challenges, Hackathons, and Requests for Proposals (RFPs) for the development of System/SoC/IP Core.
- Participation of Startups and MSME: Startups and MSMEs can also apply under various categories, using expertise from Academic institutions and R&D organisations. The MeitY Startup Hub (MSH) provides facilitation and monitors innovation and IPR activities, bringing together incubator centres and startups.
Performance
In the past 2-3 years, the C2S Programme has made remarkable strides:
- Manpower Development: More than 43,000 engineering students have been taken on for training at 113 organizations. As of June 11, 2025, 58,652 experts specializing in particular areas have been developed. The program has a goal of training 85,000 engineers within five years.
- Intellectual Property: 26 patents have been made under the program.
- Design and Prototypes: The initiative has declared winners of Analog and Digital Design Hackathons, which witnessed the involvement of 2,210 teams and 10,040 students. The newly announced BLDC Controller chip development illustrates considerable volume deployment capability. RISC-V, being open source, is of high value due to the utilization in designing CPUs, GPUs, and eco-friendly products for the nation.
- EDA Tools Access: Siemens has opened access to its EDA tools to 250 academic institutions. Moreover, 41 semiconductor design firms have been sanctioned for access to EDA tools under the umbrella Semicon India Programme.
- Startup Engagement: The scheme is presently engaged with more than 20,000 students in over 250 academic institutions and entrepreneurs in 45 startup projects, with 13 startups/MSMEs being among the 113 supported organizations.
The Semicon India Programme under which C2S works has a total outlay of ₹76,000 crore for creating the semiconductor and display manufacturing ecosystem. This also includes financial assistance towards establishment of Fabs and ATMP centres along with a Design Linked Incentive (DLI) Scheme. The DLI program provides product design incentives up to 50% of the eligible expenditure (ceiling ₹15 Crore per application) and 6% to 4% of the net sales turnover (ceiling ₹30 Crore per application) as Deployment Linked Incentive. Another ₹1000 Crore is allocated to the DLI Scheme for promotion of the fabless chip design sector.
Impact
The C2S aims to have a major impact in India’s semiconductor ecosystem and economy:
- Jobs and Economic Contribution: It is projected to create jobs and help contribute to the Indian economy, with the global semiconductor market projected to reach $1 trillion by 2030 and India’s market specifically projected to reach over US$103 billion by 2030. Furthermore, the program aims to establish India as a global hub for semiconductor manufacturing, limiting dependence on imports and further developing self-reliance.
- Democratization of Chip Design: The program aims to democratize chip design, making it accessible for anyone with innate skills anywhere in the country, in line with the vision that “Design in India is as important as Make in India.”
- Value Chain Components: The C2S strengthens every level of the ESDM ecosystem through enhanced quality manpower training, R&D, hardware IP design, systems design, and prototyping, and leverages the growing electronics value chains that India is establishing in the global space.
- Innovation and Product Nation: The program spurs innovation leading to software and hardware product outcomes.
Emerging Issues
Although the C2S Programme is promising, there are various challenges in the overall Indian semiconductor ecosystem that influence its implementation and success directly or indirectly:
High R&D and Manufacturing Costs: Semiconductor startups have high capital demands for manufacturing and R&D compared to software startups. The testing and designing phase is lengthy and costly, involving sophisticated machinery.
Recommendation: Ongoing and possibly raised government fiscal incentives (such as the DLI scheme) and simpler access to venture capital for semiconductor startups are paramount.
Semiconductor Design Complexity and Talent Deficit: Creating a chip comprises several intricate phases that need specialized expertise and equipment, which makes it hard for startups to establish end-to-end in-house talent. There is a talent deficit, more so for fabrication-specific functions, even with a high number of engineering graduates.
Recommendation: More vigorously enhance industry-academia collaboration to synchronize engineering education with the needs of industry. Emphasize specialized training programs in factory positions, even through apprenticeships and specified vocational courses.
Intellectual Property (IP) Protection: Startups have to overcome the intricate scenario of patents and trade secrets that are already in existence, with the possibility of infringement bleeding resources.
Recommendation: Provide clear IP protection guidelines and support structures for patent filing and protection especially designed for semiconductor design and provide legal assistance or consultancy services.
Supply Chain Vulnerabilities: Relying on a complex global network for sourcing materials can present supply chain vulnerabilities that could result in delays or cost overruns. Startups and others often have a difficult time negotiating contracts for materials and components.
Recommendation : Encourage raw material and critical mineral supply diversification, and promote domestic production of key components for a more resilient local supply chain.
Infrastructure Limitations: Reliable supply of ultra-pure water and an around-the-clock power supply are prime considerations in chip fabrication, and these are limitations in India.
Recommendation : Focus on robust infrastructure with reliable power grids and advanced water purification in identified semiconductor manufacturing clusters.
Scaling Academic Efforts to Industry Levels: While training engineers with programs like C2S, you still have the challenge of how to scale to meet industry standards for quality and volume of skilled manpower.
Recommendation : Develop and renew curriculum on a continuous basis to incorporate industry advances, provide more practical applied learning with real industry tools, and promote the inclusion of internships and industry project experiences for students.
Way Forward
The “Chips to Startup (C2S) Programme” is a major step towards fulfilling India’s vision of becoming an electronics system design and manufacturing global leader. Ashwini Vaishnaw, the Electronics and Information Technology Minister, has emphasized that solutions need to come from a wide variety of stakeholders through collaborations at all levels of academia, startups, students, and researchers and not limited to chosen ones. He has also put forth a gradual but progressive strategy, addressing the entire gamut of chip development—ranging from low-value, high-deployment-potential chips to high-value, low-deployment-potential chips.
Through indigenous design strengths, specialist manpower building, and development of a strong startup ecosystem, the program is a vital pillar in the “Make in India” and “Design in India” plans. India today offers great opportunities for future entrepreneurs and researchers to take the lead in developing and redefining future semiconductor systems, devices, and products. The C2S Programme, keeping pace with the country’s vision of creating a strong and self-reliant semiconductor ecosystem, is equipping the next-generation technical talent to spearhead India’s technological growth and propel the country as a semiconductor design and manufacturing global superpower. Sustained emphasis on dealing with infrastructure, manpower, and financial issues will be key to unlocking the full potential of this program and keeping India front and center in the international semiconductor value chain.
References:
- Knn India – Knowledge & News Network. (n.d.). MeitY’s Chips to Startups programme to develop 85,000professionals for semiconductor industry. www.knnindia.co.in. https://knnindia.co.in/news/newsdetails/sectors/start-up/meitys-chips-to-startups-programme-to-develop-85000-professionals-for-semiconductor-industry
- Ministry of Electronics & Information Technology. (2019). DETAILED PROJECT REPORT on CHIPS To STARTUP (C2S) PROGRAMME. In Microelectronics Development Division R&D in Electronics Group [Report]. https://c2s.gov.in/pdf/Detailed%20Project%20Report%20on%20C2S%20programme.pdf
- Modi, N. (n.d.). Vision for New India (pp. 29–118). https://c2s.gov.in/pdf/C2S%20Programme.pdf
- Government of India is democratizing Chip designing in India: India’s semiconductor moment has arrived. (n.d.). https://www.pib.gov.in/PressReleasePage.aspx?PRID=2113411
- SVECW, Shri Vishnu Engineering College for Women, Bhimavaram, Andhra Pradesh. (2025, June 6). Chips to Startup (C2S) – SVECW | Shri Vishnu Engineering College for Women, Bhimavaram, Andhra Pradesh. https://svecw.edu.in/chips-to-startup-c2s/
About the Contributor: Swanami Ghosh , an undergraduate student at Miranda House, Delhi University and Research intern at Impact and Policy Research Institute (IMPRI)
Acknowledgement : The author sincerely thanks Ms Aasthaba Jadeja and the IMPRI team for their valuable support.
Disclaimer: All views expressed in the article belong solely to the author and not necessarily to the organisation.
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